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l6234 three phase motor driver supply voltage from 7 to 52v 5a peak current r ds on 0.3 w typ. value at 25 c cross conduction protection ttl compatible driver operating frequency to 50khz thermal shutdown intrinsic fast free wheeling diodes input and enable function for every half bridge 10v external reference available description the l6234 is a triple half bridge to drive a brushless motor. it is realized in multipower bcd technology which combines isolated dmos power transistors with cmos and bipolar circuits on the same chip. by using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performance. the output dmos transistors can sustain a very high current due to the fact that the dmos struc- ture is not affected by the second breakdown ef- fect, the rms maximum current is practically lim- ited by the dissipation capability of the package. all the logic inputs are ttl, cmos and m p com- patible. each channel is controlled by two sepa- rate logic input. l6234 is available in 20 pin power dip package (16+2+2) and in powerso20. august 2003 ? pin connection (top view) ordering numbers: l6234 (power dip 16+2+2) l6234pd (powerso20) powerso20 power dip (16+2+2) out1 in1 en1 v s gnd v s gnd en3 in3 1 3 2 4 5 6 7 8 9 vcp vboot sense2 gnd gnd sense1 en2 in2 out2 20 19 18 17 16 14 15 13 12 d98in848 out3 10 vref 11 power dip (16+2+2) gnd sense1 en2 in2 out2 in1 out1 en1 v s v s en3 in3 v ref out3 v cp v boot sense2 gnd 1 3 2 4 5 6 7 8 9 18 17 16 15 14 12 13 11 19 10 20 gnd gnd d94in129a powerso20 1/10
charge pump v ref = 10v 10nf 1 m f vref vcp 0.22 m f vs 7 to 52v 0.1 m f 100 m f thermal protection th1 tl1 th2 tl2 th3 tl3 vboot 1n4148 out1 out2 sense1 out3 sense2 in1 en1 in2 en2 in3 en3 d95in309a r sense gnd block diagram l6234 2/10
thermal data symbol parameter dip16+2+2 powerso20 unit r th j-pin thermal resistance, junction to pin 12 C c/w r th j-amb1 thermal resistance, junction to ambient (see thermal characteristics) 40 C c/w r th j-amb2 thermal resistance, junction to ambient (see thermal characteristics) 50 C c/w r th j-case thermal resistance junction-case C1.5 c/w figure 1: printed heatsink thermal characteristics r th j-pins dip16+2+2 . the thermal resistance is referred to the thermal path from the dissipating region on the top surface of the silicon chip, to the points along the four central pins of the package, at a distance of 1.5 mm away from the stand-offs. r th j-amb1 if a dissipating surface, thick at least 35 m m, and with a surface similar or bigger than the one shown, is created making use of the printed cir- cuit. such heatsinking surface is considered on the bottom side of an horizontal pcb (worst case). r th j-amb2 if the power dissipating pins (the four central ones), as well as the others, have a minimum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the pcb itself. it is the same situation of point above, without any heatsinking surface created on purpose on the board. additional data on the powerdip and the powerso20 package can be found in: application note an467: thermal characteristics of the powerdip 20,24 packages soldered on 1,2,3 oz. copper pcb application note an668: a new high power ic surface mount package: powerso20 power ic packaging from insertion to surface mounting. l6234 3/10
absolute maximum ratings symbol parameter value unit v s power supply voltage 52 v v in ,v en input enable voltage C 0.3 to 7 v i peak pulsed output current (note 1) 5 a v sense sensing voltage (dc voltage) -1 to 4 v v b bootstrap peak voltage 62 v v od differential output voltage (between any of the 3 out pins) 60 v f c commutation frequency 50 khz v ref reference voltage 12 v p tot total power dissipation l6234pd t amb = 70 c 2.3 w p tot total power dissipation l6234 t amb = 70 c 1.6 (*) w t stg , t j storage and junction temperature range -40 to 150 c note 1: pulse width limited only by junction temperature and the transient thermal impedance (*) mounted on board with minimized copper area recommended operating conditions symbol parameter value unit v s supply voltage 7 to 42 v v od peak to peak differential voltage (between any of the 3 out pins) 52 v i out dc output current power so20 (t amb = 25c) 4 a dc output current power dip (t amb = 25c) with infinite heatsink 2.8 a v sense sensing voltage (pulsed t w < 300nsec) -4 to 4 v sensing voltage (dc) -1 to 1 v t j junction temperature range -40 to 125 c pin functions powerdip powerso20 name function 1 20 10 6 5 15 out 1 out 2 out 3 output of the channels 1/2/3. 2 19 9 7 4 14 in 1 in 2 in 3 logic input of channels 1/2/3. a logic high level (when the corresponding en pin is high) switches on the upper dmos power transistor, while a logic low switches on the corresponding low side dmos power. 3 18 8 8 3 13 en 1 en 2 en 3 enable of the channels 1/2/3. a logic low level on this pin switches off both power dmos of the related channel. 4,7 9, 12 v s power supply voltage. 14 19 sense2 a resistance rsense connected to this pin provides feedback for motor current control for the bridge 3. 17 2 sense1 a resistance rsense connected to this pin provides feedback for motor current control for the bridges 1 and 2. 11 16 v ref internal voltage reference. a capacitor connected from this pin to gnd increases the stability of the power dmos drive circuit. 12 17 v cp bootstrap oscillator. oscillator output for the external charge pump. 13 18 v boot overvoltage input to drive the upper dmos 5,6 15,16 1,10 11,20 gnd common ground terminal. in powerdip and so packages these pins are used to dissipate the heat forward the pcb. l6234 4/10
electrical characteristics (v s = 42v ; t j = 25c unless otherwise specified) symbol parameter test condition min. typ. max. unit v s supply voltage 7 52 v v ref reference voltage 10 v i s quiescent supply current 6.5 ma t s thermal shutdown 150 c t d dead time protection 300 ns output dmos transistor symbol parameter test condition min. typ. max. unit i dss leakage current 1ma r ds (on) on resistance 0.3 w source drain diode symbol parameter test condition min. typ. max. unit v sd forward on voltage i sd = 4a; en = low 1.2 v t rr reverse recovery time i f = 4a 900 ns t pr forward recovery time 200 ns logic levels symbol parameter test condition min. typ. max. unit v inl , v enl input low voltage -0.3 0.8 v v inh , v enh input high voltage 27v i inl, i enl input low current v in ,v en = l -10 m a i inh, i enh input high current vin,v en = h 30 m a circuit description l6234 is a triple half bridge designed to drive brushless dc motors. each half bridge has 2 power dmos transistors with r ds on = 0.3 w. the 3 half bridges can be controlled independently by means of the 3 inputs in1, in2, in3 and the 3 inputs en1, en2, and en3. an external connection to the 3 common low side dmos sources is provided to connect a sensing resistor for constant current chopping ap- plication. the driving stage and the logic stage are de- signed to work from 7v to 52v. l6234 5/10
0 8 16 24 32 40 48 0 1 2 3 4 5 6 7 8 9 10 vs [ v ] iq [ma] tj = -40c tj = 25c tj = 100c tj = 130c figure 1. quiescent current vs. supply volt- age. 0 102030405060 0.75 1 1.25 1.5 1.75 fsw [ khz ] iq/(iq@500hz) tj = -40c tj = 25c tj = 130c figure 2. normalized quiescent current vs. switching frequency. -50 -25 0 25 50 75 100 125 150 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 tj [c] vsd [v] iout=4a figure 4. source drain forward on voltage vs. junction temperature. 0 1020304050 0 2 4 6 8 10 12 vs [ v ] vref [v] tj = 25c figure 6. reference voltage vs. supply voltage. 00.5 11.5 2 0 1 2 3 4 5 vsd [ v ] isd [a] tj = 25c dmos (on) dmos (off) figure 5. typical diode forward on charac- teristics 0 8 16 24 32 40 48 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 vs [v] rds (on) [w ] tj = 130c tj = 25c tj=-40c io u t = 4 a figure 3. typical rds (on) vs. supply voltage. l6234 6/10
figure 8. powerso-20 transient thermal re- sistance figure 10. powerso-20 thermal resistance (mounted on fr4 monolayer substrate) figure 9. powerso-20 thermal resistance (mounted on aluminium substrate) figure 11. powerso-20: with external heatsink figure 12. thermal impedance of powerso-20 and standard so20 -50 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 9 10 11 t j [ c ] vref [v] vs = 52v vs = 24v vs = 7v vs = 10v figure 7. reference voltage vs. junction tem- perature. l6234 7/10
outline and mechanical data e a2 a e a1 pso20mec detail a t d 110 11 20 e1 e2 h x 45 detail a lead slug a3 s gage plane 0.35 l detail b r detail b (coplanarity) gc - c - seating plane e3 b c n n h bottom view e3 d1 dim. mm inch min. typ. max. min. typ. max. a 3.6 0.142 a1 0.1 0.3 0.004 0.012 a2 3.3 0.130 a3 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 d (1) 15.8 16 0.622 0.630 d1 9.4 9.8 0.370 0.386 e 13.9 14.5 0.547 0.570 e 1.27 0.050 e3 11.43 0.450 e1 (1) 10.9 11.1 0.429 0.437 e2 2.9 0.114 e3 5.8 6.2 0.228 0.244 g 0 0.1 0.000 0.004 h 15.5 15.9 0.610 0.626 h 1.1 0.043 l 0.8 1.1 0.031 0.043 n 8? (typ.) s 8? (max.) t 10 0.394 (1) d and e1 do not include mold flash or protusions. - mold flash or protusions shall not exceed 0.15mm (0.006) - critical dimensions: e, g and a3. powerso20 0056635 jedec mo-166 weight: 1.9gr l6234 8/10
dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.85 1.40 0.033 0.055 b 0.50 0.020 b1 0.38 0.50 0.015 0.020 d 24.80 0.976 e 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 f 7.10 0.280 i 5.10 0.201 l 3.30 0.130 z 1.27 0.050 powerdip 20 outline and mechanical data l6234 9/10
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the conse quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com l6234 10/10
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